Software
We've compiled a list of 5 free and paid alternatives to Riviera-PRO. The primary competitors include gEDA Project, Cadence Incisive. In addition to these, users also draw comparisons between Riviera-PRO and ICARUS, ModelSim, Synopsys VCS. Also you can look at other similar options here: About.
We've compiled a list of 5 free and paid alternatives to Riviera-PRO. The primary competitors include gEDA Project, Cadence Incisive. In addition to these, users also draw comparisons between Riviera-PRO and ICARUS, ModelSim, Synopsys VCS. Also you can look at other similar options here: About.
The gEDA project has produced and continues working on a full GPL'd suite and toolkit of...
System Verilog, Verilog, VHDL, SystemC HDL Simulator for ASIC Design and Verification
London, U.K. 12 March 2003 - The Pixel Farm, a new company focused on innovation in the field of...
HDL Simulator of System Verilog, Verilog, and VHDL for ASIC design and verification.
System Verilog, Verilog. VHDL, SystemC, HDL simulator targeting ASIC and large FPGA designs.
System Verilog, Verilog. VHDL, SystemC, HDL simulator targeting ASIC and large FPGA designs.
Windows
Riviera-PRO addresses verification needs of engineers crafting tomorrow’s cutting-edge FPGA and SoC devices. Riviera-PRO enables the ultimate testbench productivity, reusability, and automation by combining the high-performance simulation engine, advanced debugging capabilities at different levels of abstraction, and support for the latest Language and Verification Library Standards.
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